1 ps8197a 10/16/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI74ALVCH16952 16-bit registered transceiver with 3-state outputs logic block diagram product description pericom semiconductor?s pi74alvch series of logic circuits are produced using the company?s advanced 0.5 micron cmos technology, achieving industry leading speed. the PI74ALVCH16952 16-bit registered transceiver is designed for 2.3v to 3.6v v cc operation. the product contains two sets of d-type flip-flops for temporary storage of data flowing in either direction. the device can be used as two 8-bit transceivers or one 16-bit tranceiver. data on the a or b bus is stored in the registers on the low-to-high transition of the clock (clkab or clkba) input provided that the clock-enable (clkenab or clkenba) input is low. taking the output-enable (oeab or oeba) input low accesses the data on either port. to ensure the high-impedance state during power up or power down, oe should be tied to vcc through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. the PI74ALVCH16952 has ?bus hold? which retains the data input?s last state whenever the data input goes to high-impedance preventing ?floating? inputs and eliminating the need for pullup/ down resistors. v v c1 ce 1d c1 56 5 52 1b1 1a1 2 3 1 55 54 1oeab 1clkba 1clkenba 1oeba to seven other channels one of eight channels 1clkab 1clkenab ce 1d v v c1 ce 1d c1 29 15 42 2b1 2a1 27 26 28 30 31 2oeab 2clkba 2clkenba 2oeba to seven other channels one of eight channels 2clkab 2clkenab ce 1d product features PI74ALVCH16952 is designed for low voltage operation v cc = 2.3v to 3.6v hysteresis on all inputs typical v olp (output ground bounce) < 0.8v at v cc = 3.3v, t a = 25c typical v ohv (output v oh undershoot) < 2.0v at v cc = 3.3v, t a = 25c bus hold retains last active bus state during 3-state eliminating the need for external pullup resistors industrial operation at ?40c to +85c packages available: ? 48-pin 240 mil wide plastic tssop (a) ? 48-pin 300 mil wide plastic ssop (v)
PI74ALVCH16952 16-bit registered transceiver 2 ps8197a 10/16/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 25 26 27 28 32 31 30 29 s t u p n i t u p t u o b b a n e k l cb a k l cb a e oa hxlxb 0 ? xllxb 0 ? l - lll l - lhh xxhx z pin name description clken clock enable input (active low) oe output enable input (active low) clk clock input (active high) ax data i/o bx data i/o gnd ground v cc power product pin description truth table (1)? note: 1. h = high signal level l = low signal level z = high impedance - = low-to-high transition product pin configuration 56-pin a-56 v-56 1oeab 1clkab 1clkenab gnd 1a1 1a2 v cc 1a3 1a4 1a5 gnd 1a5 1a7 1a8 2a1 2a2 2a3 gnd 2a4 2a5 2a6 v cc 2a7 2a8 gnd 2clkenab 2clkab 2oeab 1oeba clkba 1clkenba gnd 1b1 1b2 v cc 1b3 1b4 1b5 gnd 1b6 1b7 1b8 2b1 2b2 2b3 gnd 2b4 2b5 2b6 vcc 2b7 2b8 gnd 2clkenba 2clkba 2oeab ? a-to-b data flow is shown: b-to-a flow is similar but uses oeba, clkba, and clkenba. ? output level of b before the indicated steady-state input conditions were established.
PI74ALVCH16952 16-bit registered transceiver 3 ps8197a 10/16/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 storage temperature ........................................................... ?65c to +150c ambient temperature with power applied ........................ ?40c to +85c input voltage range, v in ...................................................... ?0.5v to v cc +0.5v output voltage range, v out ............................................... ?0.5v to v cc +0.5v dc input voltage .................................................................... ?0.5v to +5.0v dc output current ............................................................................. 100ma power dissipation .................................................................................. 1.0w note: stresses greater than those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for ex- tended periods may affect reliability. maximum ratings (above which the useful life may be impaired. for user guidelines, not tested.) note: 1. unused control inputs must be held high or low to prevent them from floating. s r e t e m a r a pn o i t p i r c s e ds n o i t i d n o c t s e t. n i m. p y t. x a ms t i n u v c c e g a t l o v y l p p u s3 . 26 . 3 v v h i e g a t l o v h g i h t u p n i v c c v 7 . 2 o t v 3 . 2 =7 . 1 v c c v 6 . 3 o t v 7 . 2 =0 . 2 v l i e g a t l o v w o l t u p n i v c c v 7 . 2 o t v 3 . 2 =7 . 0 v c c v 6 . 3 o t v 7 . 2 =8 . 0 v n i e g a t l o v t u p n i0v c c v t u o e g a t l o v t u p t u o0v c c i h o t n e r r u c t u p t u o l e v e l - h g i h v c c v 3 . 2 =2 1 - a m v c c v 7 . 2 =2 1 - v c c v 0 . 3 =4 2 - i l o t n e r r u c t u p t u o l e v e l - w o l v c c v 3 . 2 =2 1 v c c v 7 . 2 =2 1 v c c v 0 . 3 =4 2 t a e r u t a r e p m e t r i a - e e r f g n i t a r e p o0 4 -5 8c recommended operating conditions (1)
PI74ALVCH16952 16-bit registered transceiver 4 ps8197a 10/16/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 dc electrical characteristics (over the operating range, t a = ?40c to +85c, v cc = 3.3v 10%) s r e t e m a r a ps n o i t i d n o c t s e tv c c ) 1 ( . n i m. p y t ) 2 ( . x a ms t i n u v h o i h o 0 0 1 - = m a. x a m o t . n i mv c c -2 . 0 v i h o a m 6 - =v h i =v 7 . 1v 3 . 20 . 2 i h o 2 1 - =ma v h i =v 7 . 1v 3 . 27 . 1 v h i =v 0 . 27 . 2v 2 . 2 v h i =v 0 . 2v 0 . 34 . 2 i h o 4 2 - =ma v h i v 0 . 2 =v 0 . 30 . 2 v l o i l o 0 0 1 = m a. x a m o t . n i m2 . 0 i l o =a m 6v l i =v 7 . 0v 3 . 24 . 0 i l o 2 1 =ma v l i =v 7 . 0v 3 . 27 . 0 v l i =v 8 . 0v 7 . 24 . 0 i l o =a m 4 2v l i =v 8 . 0v 0 . 35 5 . 0 i i v i =v c c d n g r ov 6 . 35 m a i i ) d l o h ( ) 3 ( v i =v 7 . 0 v 3 . 2 5 4 v i =v 7 . 15 4 - v i =v 8 . 0 v 0 . 3 5 7 v i =v 0 . 25 7 - v i =v 6 . 3 o t 0v 6 . 30 0 5 i z o ) 4 ( v o =v c c d n g r ov 6 . 30 1 i c c v i =v c c d n g r oi o 0 =v 6 . 30 4 d i c c v t a t u p n i e n o c c v t a s t u p n i r e h t o , v 6 . 0 - c c d n g r ov 6 . 3 o t v 30 5 7 c i s t u p n i l o r t n o cv i =v c c d n g r ov 3 . 35 . 3 f p c o i s t r o p b r o av o =v c c d n g r ov 3 . 35 . 8 notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device typ e. 2. typical values are at v cc = 3.3v, +25c ambient and maximum loading. 3. bus hold maximum dynamic current required to switch the input from one state to another. 4. for i/o ports, the i oz includes the input leakage current.
PI74ALVCH16952 16-bit registered transceiver 5 ps8197a 10/16/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 timing requirements over operating range switching characteristics over operating range (1) pericom semiconductor corporation 2380 bering drive ? san jose, ca 95131 ? 1-800-435-2336 ? fax (408) 435-1100 ? http://www.pericom.com s r e t e m a r a p m o r f ) t u p n i ( o t ) t u p t u o ( v c c v 2 . 0 v 5 . 2 =v c c v 7 . 2 =v c c v . 0 v 3 . 3 = s t i n u . n i m ) 2 ( . x a m. n i m ) 2 ( . x a m. n i m ) 2 ( . x a m f x a m 0 5 10 5 10 5 1z h m t d p k l c b r o a0 . 1 1 . 46 . 40 . 19 . 3 s n t n e r o a b e o b a e o 4 . 53 . 50 . 14 . 4 t s i d r o a b e o b a e o 3 . 54 . 41 . 10 . 4 notes: 1. see test circuit and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. s r e t e m a r a pn o i t p i r c s e d v c c v 2 . 0 v 5 . 2 =v c c v 7 . 2 =v c c v 3 . 0 v 3 . 3 = s t i n u . n i m. x a m. n i m. x a m. n i m. x a m f k c o l c y c n e u q e r f k c o l c00 5 10 0 5 100 5 1z h m t w e s l u p n o i t a r u d h g i h n e k l c3 . 33 . 33 . 3 s n w o l r o h g i h k l c3 . 33 . 33 . 3 t u s e m i t p u t e s k l c e r o f e b a t a d7 . 19 . 15 . 1 k l c e r o f e b n e k l c2 . 10 . 10 . 1 t h e m i t d l o h l c r e t f a a t a d k 6 . 06 . 08 . 0 k l c r e t f a n e k l c1 . 19 . 01 . 1 d / t d v ) 1 ( l l a f r o e s i r n o i t i s n a r t t u p n i00 100 100 1v / s n notes: 1. see test circuit and waveforms. operating characteristics, t a = 25 o c r e t e m a r a ps n o i t i d n o c t s e t v c c v 2 . 0 v 5 . 2 =v c c v 3 . 0 v 3 . 3 = s t i n u l a c i p y t c d p n o i t a p i s s i d r e w o p e c n a t i c a p a c d e l b a n e s t u p t u o c l f p 0 5 = z h m 0 1 = f 3 51 7 f p d e l b a s i d s t u p t u o4 30 4
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